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    550 jobs - Page 1 of 15 (0.17 seconds)
    Did you know? neuvoo provides you with the broadest job selection in India.
    Here at neuvoo, we always aim to provide our users with the broadest selection of unique content. It is thanks to our talented staff, who is hard at work, constantly indexing new job offers, that we have been able to grow into the largest job database in the country! This is just one of the milestones we have achieved since we started, and we are still going strong, always seeking improvement and innovation in everything we do.
    Microchip Technology Inc.
    |
    Karnataka
    - 3d ago
    Job Description. Microchip MCU16 Design team in Bangalore is looking for a Principal Engineer who has in... Hands on expertise in Synthesis flow and methodology. Hands on expertise in Timing closure flow...
    Intel Corporation
    |
    Bangalore, Karnataka
    - 1d ago
    Drive the designs to timing closure, interacting supporting synthesis and APR team during timing closure... Education. B.Tech. or M.Tech. in Electrical Electronics Engineering with 4 to 9 years' of experience...
    Wolverine World Wide, Inc.
    |
    Hyderabad, Telangana
    - 2d ago
    Should have good experience with block and full chip timing constraints development (particularly the... Good understanding of DFT flow. architecture (More from Synthesis, PnR and timing closure perspective...
    NXP
    |
    Bangalore, Karnataka
    - 1d ago
    Digital Design Engineer. Your Responsibilities. Digital circuit design and optimization (power, timing... Coverage analysis, lint and CDC analysis. Support for backend in timing closure, develop timing...
    Cadence Design Systems, Inc
    |
    Bangalore, Karnataka
    - 12h ago
    Job Description. You will work with an elete team of physical design implementation engineers and have... clock tree synthesis, timing closure, power signal integrity signoff, physical verification (DRC LVS...
    Advanced Micro Devices, Inc
    |
    Hyderabad, Andhra Pradesh
    - 12d ago
    Technical Lead. SMTS (RTL Design Synthesis STA PT). Educational Qualifications. B.E B.Tech or M.E M... Knowledge of full RTL to GDSII flow to take timing closure from RTL to signoff. Good scripting skills...
    Imagination Technologies Limited
    |
    Hyderabad, Telangana
    - 15d ago
    Customer Support Engineer (Physical Design). Imagination Technologies is one of the world's fastest... Experience of layout of Multi Million gate digital IC's in floorplaning and timing closure...
    UST GLOBAL INC.
    |
    Bangalore, Karnataka
    - 3d ago
    Floor planning, place and route, Clock Tree Synthesis, Clock Distribution, IP integration, extraction... Experience in taking the design through P&R from Netlist to GDS including timing closure and Physical...
    Synopsys
    |
    Bangalore, Karnataka
    - 1d ago
    Tasks will include but not be limited to, synthesis, floorplanning, placement of bumps and RDL routing, running the P&R flow using Synopsys tools, performing STA and timing closure, constraints...
    GlobalFoundries
    |
    Bangalore, Karnataka
    - 3d ago
    Specific Responsibilities. Implementation of digital SoC building blocks from RTL synthesis to GDS sign... including block closure for timing and performing logical and physical ECO. At least 6 years of relevant...
    Microchip Technology Inc.
    |
    Karnataka
    - 5d ago
    Job Description. The Wireless Solutions Group (WSG) is seeking a Principal Design Engineer with Front... The role will include driving and optimizing synthesis, power optimization, static timing analysis, and...
    Advanced Micro Devices, Inc
    |
    Hyderabad, Andhra Pradesh
    - 15d ago
    RTL design and functional verification, synthesis, Physical Design, Timing closure, Tape out, and post... Should be able to Lead a team, and provide Technical mentoring and guidance to junior engineers. Perform...
    Cadence Design Systems, Inc
    |
    Bangalore, Karnataka
    - 12h ago
    You will work with an elete team of physical design implementation engineers and have personal design... clock tree synthesis, timing closure, power signal integrity signoff, physical verification (DRC LVS...