DSP DFT Engineer
3d ago

Company :

Qualcomm India Private Limited

Job Area :

Engineering Group, Engineering Group >

Job Overview :

Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives.

But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products.

This is the Invention Age - and this is where you come in.

The person hired in to this role will be contributing to DFT insertion and validation effort of complex chip, core and / or blocks.

  • Responsible for taking any or all of the following aspects to closure in a timely fashion. oAnalyze, propose best compression that can be achieved for given SoC / core / block
  • oOwn and deliver scan insertion, validate equivalence check oDebug / resolve any DRC issues, identify solution and work with front-end team to ensure DFT DRCs are fixed.

    Analyzing and meeting ATPG coverage goals 99.8% for static and 90% for TDF

    oOwns STA constraints and work with STA team to resolve timing violations oOwns IDDQ constraints generation and validation

  • Working independently in the team to solve problems, enable his team to deliver on time with high quality
  • Responsible for deliverables of certain aspects of SoC DFT execution Responsible for coming up with DFT architecture and improve overall test quality
  • Skills / Experience : -In depth knowledge of DFT concepts

  • In depth knowledge and hands on experience in scan insertion, ATPG, coverage analysis, Transition delay test coverage analysis
  • Expertise in test mode timing constraints definition, knowledge in providing timing fixes / corrective actions for timing violations
  • Expertise in scripting languages such as perl, shell, etc.
  • Experience in simulating test vectors
  • Knowledge of equivalence check, DFT DRC rules both in RTL lint tool (like spyglass) and ATPG tool like (TK, TetraMax)
  • Working experience in Synopsis TetraMax / DFTMax and Cadence Encounter Test is a plus
  • Ability to work in an international team, dynamic environment -Ability to learn and adapt to new tools and methodologies.
  • Ability to do multi-tasking & work on several high priority designs in parallel.
  • Excellent problem solving skills Excellent communication and team work skills and good English is required
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