As a Principal Engineer - Verification, you will be responsible for verifying high performance and challenging designs of SAS / PCIe based storage devices IPs.
The responsibilities include contributing to complete flow of verification including test bench development, Verification, debugging and Coverage analysis.
Skill set :
Industry experience 8+ years
Very good knowledge in Digital Electronics
Hands on experience in Specman or System Verilog
Prior experience in handling TB, Testcases, Verification Plan, Coverage
Good Analytical and debugging skills
Hands on Experience in VHDL / Verilog code
Highly self-motivated, well organized and result oriented.
Knowledge in Scripting in any one language like TCL, Perl.