Structural Design Lead
Intel Corporation
Hyderabad, , IN
15d ago

Job Description

Creates bottomsup elements of chip design including but not limited to FET, cell, and blocklevel custom layouts, FUBlevel floor plans, abstract view generation, RC extraction and schematictolayout verification and debug using phases of physical design development including parasitic extraction, static timing, wire load models, clock generation, customer polygon editing, autoplace and route algorithms, floor planning, fullchip assembly, packaging, and verification.

Troubleshoots a wide variety up to and including difficult design issues and applied proactive intervention. Schedules, staffs, executes and verifies complex chips development and execution of project methodologies and / or flow developments.

Requires expansive knowledge and practical application of methodologies and physical design.

Qualifications

Major Responsibilities : The candidate will be responsible for completion of tasks that include place and route, clock tree synthesis, power grid analysis, signal integrity analysis and timing closure.

The candidate must be able to take complete responsibility for the electrically correct completing of high speed hard macros.

Minimum Qualifications : Minimum 6-11 years of experience in all aspects of Physical Design Place & Route implementation.

Experience with taping out FinFET designs using 16nm or below technology nodes. Experience with the complete physical design flow using EDA tools Cadence Innovus, Virtuoso Synopsys ICC / ICC2, PrimeTime, StarRC, Mentor Graphics Calibre, Apache Redhawk.

Understanding of electrical characteristics, such as EM, IR, ESD along with solid timing skills.Proficiency in scripting language, such as, Perl, Tcl, Unix Shell required.

Education Requirements BE / B.Tech / ME / M.Tech from Reputed

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms.

PEG strives to lead the industry moving forward through product innovation and world class engineering.

Legal Disclaimer :

Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.

It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel’s offices for various positions and further requiring them to deposit money to be eligible for the interviews.

We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money.

We would urge people interested in working for Intel, to apply directly at and not fall prey to unscrupulous elements.

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