NVIDIA is seeking a dynamic Pre & Post Si Validation Engineer to verify the next generation of memory subsystem units for the world’s leading GPUs and NVSwitches .
This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence.
We have crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.
At NVIDIA, our employees are passionate about parallel and visual computing. We're united in our quest to transform the way graphics are used to solve some of the most complex problems in computer science.
The GPU started out as an engine for simulating human imagination, conjuring up the amazing virtual worlds of video games and Hollywood films.
Today, NVIDIA’s GPU simulates human intelligence, running deep learning algorithms and acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world.
NVIDIA is increasingly known as the AI computing company.
What you’ll be doing :
On Pre-Si validation, you will be responsible for verifying the ASIC design, architecture and micro-architecture of memory sub-systems / units using advanced verification methodologies.
On Post-Si validation, you will be responsible for bringing up features on Silicon, triaging and debugging failures, working with various teams in a fast paced environment.
You will gain high visibility and interact with various cross-geographical teams.
Use advanced verification methodologies like SV / UVM.
Build reusable bus functional models, monitors, checkers and scoreboards following coverage driven verification methodology.
Perform functional coverage driven verification closure.
You will be working with architects, designers, and pre and post silicon verification teams to accomplish your tasks.
What we need to see :
B.Tech. / M.Tech. with 2-5 years of relevant experience. Experience in Pre and / or Post-Si validation.
Exposure to verification using random stimulus along with functional coverage and assertion-based verification methodologies
Great triaging and debugging skills.
Knowledge in System Verilog or similar HVL
Experience in verification methodologies like UVM / VMM and exposure to industry standard verification tools for simulation and debug
Ways to stand out from the crowd :
Experience in Post-Si validation
Good debugging and analytical skills
Scripting knowledge (Python / Perl / shell)
Good communication skills & dream to work as a great teammate
With competitive salaries and a generous benefits package,