Niksperri Technologies - STA/Synthesis Engineer - Physical Design & Timing Analysis (5-10 yrs) Bangalore/Pune (Semiconductor/VLSI/EDA)
Niksperri Technologies Pvt. Ltd.
Pune
6d ago
source : hirist.com

Responsibilities include, but not limited to :

  • Hands-on write constraints for designs with complex clock structures
  • Constraint& mode reduction, own design timing across functions
  • Drive Design margins
  • Setup distributed processing flows for STA
  • Generate timing ECOs for Physical design
  • Validate timing constraints
  • Build / Create PoR for STA
  • Come up with innovative ways to reduce TAT and bring more predictability.
  • Mentor junior engineers
  • Minimum Qualifications :

  • A minimum with 8-16 years of physical design experience
  • Has done atleast one full hands-on TO in 16nm or below.
  • Proficient in design margins
  • Proficient in SDC constructs
  • Proficient with EDA tools from Synopsys / Cadence
  • Proficient in Tcl and Perl
  • Excellent analytical skills
  • Shown ability to collaborate in a multi-functional environment, cross-site or cross-time zone
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