ON Semiconductor
India, IN, IN
1d ago

Senior digital backend design engineer with hands on design tape outs experience will have responsibilities of.

Netlist to GDS development and full chip / macro integration to develop mixed signal products

Floor planning, Power planning / analysis, Pad ring creation, Full-chip Place and Route, Layout edits, Timing closure, Signal routing / coupling / shielding, Reliability / ESD / EM, Physical verification, Debug and sign-

off using the latest CAD tools

Working with team members / design engineers for innovative, optimal and automotive physical design solutions to improve performance, execution and complex chip level implementation

Using production quality workflow and documentation procedures


BSEE or equivalent as academic qualifications (MSEE a plus)

5+ years experience with well versed in complete RTL to GDS design flow, participated in all stages of design. Candidates with higher experience, understanding with front end flow will be given preference

Good expertise of Place and Route, Constraints development & Timing analysis, Layout criticalities such as matching, shielding, Timing / Signal-

integrity, EM, IR , Antenna analysis, Latch-up, ESD, IO’s, Package design / technology limitations etc

Proficiency using Cadence, Synopsys and similar industry standard tools, Experience with sign-off tools like PT-SI & ETS, Scripting languages (e.

g. Perl, shell, tcl, etc) a plus

Team player, Good Personal skills, Methodology driven, Problem solving and Analytical thinking

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