SoC Debug Tool Development Senior Engineer
Intel Corporation
Bangalore, IN
4d ago

Job Description

Debug Tool Engineer, you will develop and enable various tools and libraries that aid in Post-Silicon debug for various Intel Discrete Graphics products.

You will need to work on Emulation and Post-Silicon platforms to ensure IP / SoC are ready for first silicon bring-up and throughout the post-silicon validation phase provide consistent support to the Debug engineers to root cause platform, firmware and silicon issues.

This role requires you to work in multiple system areas and interface with Architecture, Design, and Pre-silicon Validation teams, providing feedback for actual and future on-die debug feature teams in improving post silicon test content and providing feedback for future on-die features


  • A BS MS degree in Electrical / Electronic Engineer, Computer Science Engineer or similar engineering degree with at least 5-12 years of experience in product development or validation.
  • Proficient in Python scripting and Object-Oriented programming.
  • Experience in working with various Closed and Open Chassis debug interfaces like LTB / XDP etc.
  • Experience and hands on skills with LTB, ITP, Logic Analyzers, Oscilloscopes, Scan dumps, and in-circuit Emulators
  • Hardware debug capabilities using instruments, but not limited to Scope, Logic Analyzer or Protocol Analyzer.
  • Good understanding of the DFD / DFT architecture, JTAG / Tap interface / network
  • Experienced with IP / SoC firmware architecture
  • Experience in GUI tool development for debugging on Silicon
  • Experience in debugging using JTAG / TAP interface
  • Prior Experience in Post si debug and validation at System or IP level
  • Experience with Post Silicon Debug / Validation and / or Emulation
  • Expertise in analyzing patterns using trace data / scan captures
  • Good problem solving and analytical skills, stakeholder management skills - Strong interpersonal communication skills and comfortable interfacing with multiple forums
  • Good organizational skills, including being able to plan and prioritize tasks.
  • Both written and spoken fluid English communication
  • Prefer System debug and post-si experience
  • Prefer Experience working in a pre-si verification environment including Emulation and Virtual Platforms
  • Experience with IP / SoC Debug subsystem development
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