Senior Engineer SOC Design Verification
Advanced Micro Devices, Inc
Bangalore, IN
6d ago

What you do at AMD changes everything

At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-

performance computing, graphics, and visualization technologies building blocks for gaming, immersive platforms, and the data center.

Developing great technology takes more than talent : it takes amazing people who understand collaboration, respect, and who will go the extra mile to achieve unthinkable results.

It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.

If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.

yAMD’s RTG India team is looking for an experienced SOC Design Verification Engineer to join the SOC design team and deliver the next generation of next generation of cutting-

edge graphics designs KEY RESPONSIBILITIES We are currently looking for a SOC DV Technical staff who will be part of a team working on next gen of a complex SOC design which include integration of GPU core, Multi-

Media, IOs, etc. The successful candidate will play a key role in SOC verification performing the following duties for functional, power, and performance aspects with simulation and hardware emulation environment.

A truly multidisciplinary function, working in close collaboration with the front end designers and physical designers on the various SOC verification efforts Interacting with a wide variety of internal and external design verification development teams, DV methodology, and Silicon IP and tool vendors.

Work with architects, and the design and DV team to define develop Testplan and execute system verification plan from power management, system features e.

g. power management, DFT DV, interoperability, multi-engine Security, Coherency, etc. MAIN REQUIREMENTS Bachelor / Master Degree in Electrical / Computer Engineering.

Master preferred 4+ years of ASIC design and verification experience and deep knowledge of GPU.. Proven experience of the latest design verification methodology such as assertion coverage based driven verification (code & functional coverage), constraint random test generation, and familiar with the latest languages such as SystemVerilog, UVM / OVM, SystemC / C++,SVA, In depth knowledge of ASIC design fundamentals.

Proven debugging and problem analysis skills. Strong documentation and communication skills. Good people and project management skills and organized and methodical with proven ability to plan and execute Ability to work well in a dynamic, fast-

paced, pressure filled environment.

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