ASIC Digital Design Engr, II
Synopsys, Inc
INDIA - Noida
20d ago

Job Description and Requirements

Looking for highly motivated ASIC Digital Design Engineer to be part of High Speed Serdes Digital Design Team. As part of this team , you will be working on digital part of serial link PHY IPs.

Candidate will participate and be responsible for one or more of the following

  • Proposing micro-architecture of design changes based on customer requirements , analog requirements , system performance improvements or overall robustness of design
  • Implement RTL in Verilog and run Spyglass CDC / RDC / Lint / Tmax
  • Implement system algorithms for calibration and adaptation of Serdes components in firmware
  • Drive verification teams and pass design through verification cycles
  • Close timing with Physical Design team
  • Support silicon validation
  • Execute FPGA prototyping of the designs
  • Requirements

  • B.Tech / M.Tech with at least 1+ years experience in micro-architecture and RTL development of complex blocks
  • Strong digital design fundamentals
  • Good understanding of ASIC digital design flow with hands-on experience in at least two of the below domainsMicro-architecture and Verilog RTLcodingTiming constraints development and synthesis flowDesign for TestLint / CDC / RDC using Spyglass or any other tool
  • Proficiency in scripting and automation using TCL / PERL / Python
  • Exposure to High speed interface protocols like USB, PCIe will be added plus
  • Exposure to FPGA prototyping and implementation flow will be added plus
  • Excellent debug and analytical skills
  • Good communication skills with proficiency in at least one documentation / diagram generation tool
  • Apply
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