Principal Engineer
Microchip Technology
Hyderabad, Andhra Pradesh ,IN
2d ago

Job Description

The Microchip FPGA Software Engineering team delivers a comprehensive software suite for designing Microchip’s FPGAs and managing the entire design flow from entry, to synthesis, through place-and-route, timing, power analysis, and simulation.

We have a position in the Timing & Power Products group. As a key member of this R&D team, you will leverage your solid foundation in computer science to develop new timing and power related enhancements.

You will be an important contributor to our team and to our company your work will become a vital component of our flow, and your discoveries will enrich the state of cutting-edge research.

Location : Hyderabad, India

Responsibilities :

Develop state-of-the-art FPGA timing and power algorithms to improve circuit performance, power, and tool runtime

Execute methodical, scientific experiments to validate the extent of algorithmic improvements

Perform design reviews, unit testing, and code reviews

Own and maintain code modules

JOB REQUIREMENTS

Minimum Qualifications :

BS, MS or PhD in CS or related field

5+ years of related experience

Strong knowledge and ability in C++, as well as a deep understanding of algorithms and data structures

Preferred Qualifications :

Exposure to timing, and / or power algorithms for FPGAs or ASICs

Experience with source code management systems (ClearCase, Git, svn, Perforce)

Experience with shell scripting languages (Perl, Python, Bash, TCL)

Comfortable with large-scale software development in a Linux environment

Job Requirements

The Microchip FPGA Software Engineering team delivers a comprehensive software suite for designing Microchip’s FPGAs and managing the entire design flow from entry, to synthesis, through place-and-route, timing, power analysis, and simulation.

We have a position in the Timing & Power Products group. As a key member of this R&D team, you will leverage your solid foundation in computer science to develop new timing and power related enhancements.

You will be an important contributor to our team and to our company your work will become a vital component of our flow, and your discoveries will enrich the state of cutting-edge research.

Location : Hyderabad, India

Responsibilities :

Develop state-of-the-art FPGA timing and power algorithms to improve circuit performance, power, and tool runtime

Execute methodical, scientific experiments to validate the extent of algorithmic improvements

Perform design reviews, unit testing, and code reviews

Own and maintain code modules

JOB REQUIREMENTS

Minimum Qualifications :

BS, MS or PhD in CS or related field

5+ years of related experience

Strong knowledge and ability in C++, as well as a deep understanding of algorithms and data structures

Preferred Qualifications :

Exposure to timing, and / or power algorithms for FPGAs or ASICs

Experience with source code management systems (ClearCase, Git, svn, Perforce)

Experience with shell scripting languages (Perl, Python, Bash, TCL)

Comfortable with large-scale software development in a Linux environment

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