SoC Design Engineer Job Description The Ethernet Smart NIC group develops high-speed cutting-edge Ethernet controller ASICs for Cloud customers with support for Crypto and Compression, advanced HW-based storage protocols and compute capabilities.
Our products are targeted for the comms and cloud data center industry and serve as a critical ingredient of Intel's Data Centric strategy, in shaping the Data Center and delivering an Intel end to end solution for this growing market.
Prior experience and expertise in micro-architecture and RTL logic design of SOC features is required. Understanding of RTL implementation trade-offs.
Guide logic integration and validation and ensure the feature meets the spec intent. Hands-on experience in either one or more of full chip design topics that includes.
Understanding and hands-on experience on latest generation PCIe standards up to Gen5 and RTL ownership of the 3rd party IP.
Understanding and handling of IO Muxing and GPIO in the full chip-SOC Experience in design of clock and reset control circuitry for the full chip Understanding and integration of the Security IPs and full chip security flow Understanding and handling of multiple peripheral interface IPs like I2C, UART, NCSI and SPI Design For Debug experience (Intel or External) - advantage ARM experience - advantage Understanding of any industry standard interconnect advantage Understanding of on chip low power topics - advantage Familiarity with ASIC project development stages, physical design, emulation, validation process.
Qualifications 7y Logic design experience in an ASIC development company. BTech / MTech in Electronics Engineering.