Verification Engineer II
Great Logics
5d ago
source : Shine

Verification Engineer II - VEAN02 (5+ years of exp.)

Responsibilities Verify functionality of high performance memory sub - system at the unit and / or sub - system. Develop and execute test - plans for verifying correctness and performance of the design.

Own and debug failures in simulation to root - cause problems Closely work with logic designers of the block being verified for test plan development , execution , debug and coverage closure.

Requirements : Good knowledge of memory coherency , memory ordering. Strong background in Soc verification methodology and test bench development using HVL such as Verilog , System Verilog , UVM and C / C++.

Strong verification skills , understanding of methodology (object oriented programming , white - box / black - box , directed / random testing , coverage).,

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