You will be key to build, enable, and improve Emulation platforms for multiple Xeon SOC products. In the process you will have unique opportunity to learn architecture and micro-
architecture of multiple Intel products. You will be responsible for bring-up and path clearing of features required to enable Pre Silicon and post Silicon functional validation as well as SW development / validation.
You will also develop and design collaterals required for running these tests which includes transactors, assembly / C++ tests, and initialization code procedures.
You will develop improvements to usability by RTL validation and debugging of failing RTL tests on the emulation platform.
You will develop and apply automation aids, flows and scripts in support of emulation ease of use and improvement of equipment utilization.
You will also guide and co-ordinate different stakeholders in the development of the new design collaterals. You will also own planning and forecasting emulator requirements.
Additional Qualifications ( desirable)
Inside this Business Group
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