Microchip Technology Inc. is a leading provider of embedded control applications. Our product portfolio comprises general purpose and specialized 8-bit, 16-bit, and 32-bit microcontrollers, 32-bit microprocessors, field-programmable gate array (FPGA) products, a broad spectrum of high-performance linear, mixed-signal, power management, thermal management, radio frequency (RF), timing, safety, security, wired connectivity and wireless connectivity devices, as well as serial Electrically Erasable Programmable Read Only Memory (EEPROM), Serial Flash memories, Parallel Flash memories, and serial Static Random Access Memory (SRAM).
We also license Flash-IP solutions that are incorporated in a broad range of products.
To support Physical Design-related project activities for the MPU32, MCU32, and WSG Business Units in Microchip. The product's focus is on 32-bit microprocessors, microcontrollers, and wireless design and implementation.
Job activities :
Implement all aspects of physical design such as floor planning, placement optimization, clock tree synthesis, routing, crosstalk avoidance, and physical verification
Utilize hierarchical systems-level design techniques to build designs exceeding multi-million gates.
Working on the place and route methodologies and low power methodologies.
Must be a self-motivated team player who can collaborate with multiple teams across a geographically diverse company to achieve desired design goals.
Detailed job functions include :
Timing closure support to maximize process node capability.
Clock tree setup / debug and synthesis for optimal QoR.
General physical implementation procedures.
Multi-voltage island-based floorplan design and support.
Flow development and automation implementation.
Delivering Physical Verification-clean designs.
Die size estimation and Bond out approval.
Interfacing with external vendors and IP sources to resolve problems.
Working with members from international design / implementation teams.
The successful candidate will have a graduate degree in B.E / B.Tech.
Basic design knowledge with RTL (VHDL / VERILOG) Coding
Understand logic timing requirement (setup / hold / uncertainties)
Scripting skills in any programming language (preferably Perl, TCL and Shell) is a plus.
Knowledge on RTL coding and synthesis concept is a plus.
Able to work independently under local project lead / supervisor mentorship
Excellent debugging and analytical skills
Good verbal and written communication skills and strong interpersonal skills