VLSI Engineer - Verification
Wipro Limited
3d ago
source : Shine
  • Good in ASIC Verification
  • Good in SV / UVM Concepts
  • Good hands-on in Functional and Code coverage analysis
  • Worked on UVM based Verification environment
  • Good in writing assertions, checkers, drivers
  • Good in Perl, shell scripting
  • Good in communication skills
  • Mandatory Skills : ASIC Verification VLSI HDL Verification, VLSI-VERIFICATION PLANNING, VLSI HVL Verification

    Desirable Skills : Gate Level Simulation - GLS, System Verilog - SV

    Language Skills : English Language

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