What you'll be doing
Define and develop system-level methodologies, tools, and IPs to build SOCs in an efficient and scalable manner.
Identify pain points and inefficiencies in the front-end chip implementation process and propose ideas to solve them.
Responsible for front-end design quality checks, reviews and driving those with cross-functional teams.
What we need to see :
B.Tech or M.Tech or equivalent experience in Electronics or Computer Engineering.
2+ years of industry experience in chip design, specializing in SOC integration and design automation. Padring and fuse / floorsweep design experience is a plus.
Excellent analytical and problem-solving skills.
Experience in RTL design (Verilog), System-On-Chip design / implementation flow, and design automation.
Strong coding skills in Perl, Python, or other industry-standard scripting languages.
Exposure to various Chip Design Functions to be able to collaborate and solve complex cross functional problems.
Excellent communication skills to interact with cross functional teams to build consensus.
Good teamwork spirit and collaboration skills with team members.
Experience in synthesis, physical design and DFT s a plus.
Experience in RTL Build and Design Automation is a plus.