VLSI Analog Architect
Wipro Limited
4d ago
source : Shine

Should have SoC and IP level Functional Verification experience of   > 10 Yrs.

Expert in System Verilog based Test Bench Architecture development

Good hands-on on SV-UVM based Test environment components implementation such as SV Testbench, drivers, monitors, scoreboards, checkers

Should have good ASIC / SOC System Level Architecture knowledge

DFX validation

Familiar with System Verilog Assertions, Code and Functional Coverage and Formal verification techniques.

Strong working knowledge of any of these protocols : DDR, USB, PCIe, Ethernet, SATA,AXI.

Experience in setup and debug of gate level simulation

Knowledge of low power verification

Knowledge of synopsys tools is desired

Strong understanding of verification process from test plan to coverage completion

Strong communication and Analytical skills

Proficient in debugging and issue fixing

Good Customer Orientation

Mandatory Skills : VLSI HVL Verification Analog Circuit design, Hardware Designing, Analog and Mixed signal Verification

Desirable Skills :

Language Skills : English Language

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