In this job the Candidate shall be part of Physical Verification and Sign-Off Team and resolve problems related to DRC, LVS, ERC, FC Integration and TapeOut.
You would be needed to manage Physical Sign-Off of partitions as well as SoC. In addition you may also be needed to contribute on Physical Verification activities
on Intermediate SoC hierarchies. On need basis you will have to interact with contingent workers and drive the activity done by them.
You would also be contributing in any activities related to methodology development in Physical Verification Domain, SoC Analog Routes, SoC Top Metal Routes.
Additional skills include :
diverse team environment.
Qualifications and experience
You must possess a Bachelor of Engineering degree or Master of Engineering in Electrical and / or Electronics Engineering with 3-7 Years of relevant experience with the skills in Physical Verification .