What you do at AMD changes everything
At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies building blocks for gaming, immersive platforms, and the data center.
Developing great technology takes more than talent : it takes amazing people who understand collaboration, respect, and who will go the extra mile to achieve unthinkable results.
It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.
If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
THE PERSON :
This is a very high visibility role, involving communication across various geographies.
Strong problem-solving, debugging skills and attention to details
Good interpersonal skills (verbal and written)
Strong passion for achievement and career development
Never say die attitude
A self-motivated team player
KEY RESPONSIBILITIES :
Responsible for Synthesis, Constraint Generation & Timing closure using industry-standard tools like Design Compiler and Prime Time
Explore various Synthesis flow options to bridge the difference between Physical Design teams QoR with that of IP
Independently be able to evaluate and map RTL to Netlists for coming up with possible timing improvements with RTL modification
Understanding various ECO flows and exploring ECO implementation both manual and automated
Debugging Logic Equivalency failures using Formality
Evaluates all aspects of the process flow from high-level design to synthesis, timing, power and other front-end activities like Lint / CDC etc.
Should be able to come up with various simulation scenarios for power stress and perform Power Analysis using state of art EDA tools like Power Artist / Prime Time (Power)
Should have strong scripting abilities, and familiarity with databases to automate wherever it is necessary
PREFERRED EXPERIENCE :
A strong interest and passion for ASIC Design
An inquisitive mind that is eager to explore beyond the defined processes and flows, for highest quality deliverables.
Strong Digital logic Design principles and Analysis skills.
Some experience with Simulation, Synthesis tools
Good understanding of Verilog HDL coding for synthesis and ASIC Frond-End implementation flows
Strong UNIX and scripting languages like shell / Perl / Python
Familiarity with Tcl is a huge plus.
ACADEMIC CREDENTIALS :
Minimum BE / ME EE / CE, or equivalent degree with about 9 years of hands-on design / synthesis / LEC / timing / power closure experience in ASIC product development.
Requisition Number : 77534
Country : India State : Telangana City : Hyderabad
Job Function : Design