Develop, deliver and maintain fixed-point C++ / SystemsC models for physical layer (PHY) hardware implementation of Qualcomms next generation 802.
11ax WiFi transceiversAbility to understand various WLAN standards (802.11 a / b / g / n / ac) and 802.11ax Draft 4.0Models are used as golden reference for design verification (DV) as well as performance characterization and final performance signoffsPerform EVM analysis and optimize various bit widths so that the model can be used for bit exact testing on RTLIdentify performance deficiencies and propose enhancements to implementation of PHY algorithmsWork closely with Standards, Design Verification and Emulation teams to ensure timely deliveries of C++ models and verified designsDevelop large-scale automation tools and testing infrastructure for code-quality assurance and performance characterization of end-to-end models Minimum Qualifications Bachelor's degree in Engineering, Information Systems, Computer Science, or related field.
2+ years Hardware Engineering experience or related work experience. Preferred Qualifications Minimum Qualifications : Masters degree in Electrical / Electronics Engineering (esp.
Communications and Signal processing)Strong PHY algorithm and communication system design backgroundStrong verbal and written communication skills, with ability to clearly organize and articulate informationStrong fundamentals in at least one of the following domains : wireless communications, digital signal processing, information & coding theoryGood knowledge of DSP concepts : sampling, interpolation / decimation, aliasing, filtering, fixed point arithmeticDesired Qualifications : Ph.
D. degree in Electrical / Electronics Engineering or Computer ScienceExperience in fixed point C++ or SystemC HW model developmentExperience working with geographically distributed teamsKnowledge of AGC and radio operation : gains / gain changes, signal power computation, noise sources.
Knowledge, at a signal processing level, of data-converters and general RF impairments