MTS,Logic Design Engineering
1d ago

Duties :

  • Develop micro-architecture and RTL design for digital components for SERDES IPs such as PCS
  • Generating soft-macros (RTL) to be used in test-chip / product designs
  • Setup and analysis of lint, synthesis, timing and DFT reports
  • Support Protocol validation activities
  • Qualifications

    Skills / Qualifications :

  • Electrical / Electronic Engineering with at least 3 years of experience in Logic design, Micro architecture definition
  • Experience working with multiple clock domains
  • Experience with synthesis flow
  • Knowledge of SERDES technology such as PCI Express, Ethernet, USB is a plus
  • Experience working in a multi-site environment
  • Apply
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