Creates bottomsup elements of chip design including but not limited to FET, cell, and blocklevel custom layouts, FUBlevel floor plans, abstract view generation, RC extraction and schematictolayout verification and debug using phases of physical design development including parasitic extraction, floor planning, fullchip assembly, packaging, and verification.
Troubleshoots a wide variety up to and including difficult design issues and applied proactive intervention. Schedules, staffs, executes and verifies complex chips development and execution of project methodologies and / or flow developments.
Requires expansive knowledge and practical application of methodologies and physical design.
B.Tech / M.tech in Electronics & Communication / Electronics and Electrical
Inside this Business Group
As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.
Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly / test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth
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