Overview In this role, you will be part of the Design Enablement team responsible for PDK development across Custom / Analog / RFA technology nodes.
As a member of the CAD team, you will be working closely with Custom, Analog & RF Engineers to develop & support flows for Circuit Simulation, IP characterization and improving overall simulation methodology.
You may also be responsible for supporting transistor level EM / IR analysis flows including Static / Dynamic IR, Signal & Power EM, and IP / SoC interface modeling and signoff.
In this highly cross functional role, you will also contribute to or gain experience in various aspects of PDK development including Schematic capture, Layout, pCells, Custom P&R flows & Automation flows etc.
Minimum Qualifications Minimum Qualifications
Masters in Engineering, Computer Science, or related field.
Good understanding of CMOS fundamentals and Circuit Design Concepts
Aptitude for Programming
Good communication skills and ability to work collaboratively in a team environment
Preferred Qualifications 2+ years of industry experience in transistor-level SPICE simulations with knowledge of Custom / Analog designExpertise in one or more of the SPICE simulation tools (Hspice, Spectre APS, AFS, CustomSim, FineSim, ADS, GoldenGate etc.
Experience with supporting transistor level EM / IR flowsKnowledge of Virtuoso suite of tools Schematic, Layout, Analog Design Environment etc.
Proficiency in one or more of the programming / scripting languages SKILL, Python, Perl and TCL.Knowledge of FinFet & SOI processes is a plus Education Requirements
Required : Master's, Electrical Engineering