Lead Software Engineer
Cadence Design
5d ago
source : Shine

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Job Description

This position requires the development and verification of Verification IPs for various standards specifications.

Developing performance optimized VIPs for latest (draft / ballot) specifications of various protocols and interfaces.

Verifying the VIPs for proper functionality and system scenarios (including erroneous conditions)

Developing test suite and compliance test suite for 100% functional coverage for a given specification.

Documenting the design and implementation for engineering details and for customers.

Interacting with internal and external customers and resolving issues in a timely manner.

Required Skills

Good working knowledge of various verification concepts such as Verification architecture, coverage, checkers, test plan etc.

Strong in building Verification environments based on UVM, System Verilog

Should have participated in building IP / full chip verification environments, verification planning and closure process.

Domain expertise in NVMe, SAS, SATA, WiFi, Bluetooth, DFI, DDR / LPDDR, PCIe, Flash would be a strong plus

Programming skills : C, Verilog, System Verilog mandatory. C++ would be a strong plus.

Very good debugging and analytical skills

Should have good communication skills and should be a good team player

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