ASIC Physical Design Engr, Sr I
Noida, INDIA
6d ago

and Requirements

Full chip layout integration, IORing Co-design and Tape-out Engineer

GPIO+ team is ramping up Test Vehicle Activity to enhance Si learning and provide robust solution to our customers. We are looking for Full chip layout integration, IORing Co-design and Tape-out Engineer with below requirements

Responsibilities :

  • Perform full chip layout integration with partitions, IO and FC bumps
  • Provide bumping data and bonding diagrams for substrate and EWS test including performing signoff bonding checks
  • Execute and perform tape-out layout signoff steps (dummy / fill generation, physical verification, sealring, metrology fublets, markers) and ensure reviews with all stakeholders
  • Provide early layout feedbacks to PD and IP teams
  • Complete the tape-out delivery of the full-chip layout to the Reticle assembly team including waivers
  • Work with foundry interface teams for different layout rules understanding and clarification
  • Key Qualifications and skills :

  • BS / BTech / Mtech with 6 yrs+ relevant FCL, IORing Co-design and tape-out experience
  • Rick Experience of executing multiple tape out deliveries independently in any of the top 5 foundries in Finfet and FDSOI technos
  • Strong scripting skills in Perl or Tcl or Python
  • Basic knowledge of ATE and Package tests and related ecosystem e.g. probecard, ballout, package substrate, tester channels and others
  • Desirable qualifications :

  • Experience in ESD structure integration for silicon qualification
  • Basic exposure of On-chip characterisation methodology and application in a design
  • Experience of implementing full IORing with co-design
  • Experience in implementing partitions to fulfil Mixed signal IP silicon qualification of DC / AC characteristics including HTOL and ESD qualification
  • Prior experience and understanding of on-chip characterisation circuits design and integration
  • Our Silicon IP business is all about integrating more capabilities into an SoC faster. We offer the world’s broadest portfolio of silicon IP predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors.

    All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications.

    And get differentiated products to market quickly with reduced risk.

    At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence.

    The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security.

    If you share our passion for innovation, we want to meet you.

    Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.

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