Experience with hardware control for physical layer 4G / 5G data path processing
Understanding of 5G and 4G 3GPP protocols.
We are looking for candidates with deep understanding of software engineering principles, and core computer science fundamentals.
Fundamental facility with C and C++, compilers, build and source code control tools.
Significant experience with memory constrained Real Time Operating Systems (RTOS) and concurrent programming.
We are looking for candidates with good fundamentals of signal processing and digital communications
Working knowledge of computer architecture with particular emphasis on the HW / SW interfaces of high speed communication subsystems.
Experience with silicon prototyping, emulation systems, and virtual platforms.
Proficiency debugging embedded software systems. Familiarity with UARTs, JTAG, and oscilloscopes.
Some mainstreamOS application level development and Python or Perl scripting experience.
We are hiring across levels and looking for 4 - 15 years of relevant experience
Implement key 3GPP protocols and control / data path processing algorithms with very tight time, latency and energy budgets by interfacing to specialized cellular ASIC hardware.
Examples of processing include 3GPP channels and procedures such as : a) PDCCH, PDSCH, PBCH b) PUCCH, PUSCH, PRACH c) UL / DL HARQ d) Tracking loops- Work with silicon designers to define HW interfaces, processors, bus, DMA, accelerator, and memory subsystems.
Specify, design, and implement the firmware architecture of a state-of-the-art mobile wireless communications system. - Assist in the development of pre-silicon emulation systems / virtual platforms and use them for pre-silicon FW design and HW verification.
Evaluate and implement leading edge tools for build, formal verification and test. - Define methodologies and best practices.
Education & Experience
Bachelor’s degree in electrical engineering, electronics and telecommunications, computer engineering or computer science is required.