Senior Engineer/lead - ASIC Verification (ddr)
3d ago
source : Shine

Detailed Description of the Job Profile

  • Work involves executing complete verification project in the role of project leader or senior engineer with hands on experience, mentoring, client communication / interactions, in-depth technical reviews and close tracking of technical as well as management aspects.
  • A great team player and motivator.
  • Very much adaptive to demanding situation and fast decision maker.
  • Technical Skill Required

  • At-least 4 years of experience in System Verilog HVL.
  • At-least 3 years of experience in OVM / UVM / VMM / Test Harness.
  • At-least 2-3 years of experience in working on DDRx family or HBM. Especially DDRx IP Controller verification and even working at SoC level.
  • DDR4-5-6 is preferable.

  • Hands on experience of developing assertion, checkers, coverage and scenario creation.
  • Must have executed at-least 1 SoC Verification project.
  • Experience in developing test and coverage plan, Verification environment and validation plan.
  • Knowledge of at-least one industry standard protocols like Ethernet, PCIe, MIPI, USB or similar is required.
  • Management

  • Team handling experience : size 3 or more minimum, duration 1 year minimum
  • Define / derive Scope, Estimation, Schedule and Deliverables of proposed work.
  • Assure compatibility of resources, tools, platform
  • Work with customers through acceptance of deliverables.
  • Effectively manage team members through coaching and mentoring and provide guidance and career planning to team-members.
  • Ensure customer satisfaction
  • Perks and Benefits

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