NXP Semiconductors N.V. (NASDAQ : NXPI) enables secure connections and infrastructure for a smarter world, advancing solutions that make lives easier, better, and safer.
As the world leader in secure connectivity solutions for embedded applications, NXP is driving innovation in the automotive, industrial & IoT, mobile, and communication infrastructure markets.
Built on more than 60 years of combined experience and expertise, the company has over 29,000 employees in more than 30 countries and posted revenue of $8.88 billion in 2019.
Scope of Responsibilities / Expectations
Leading DFT implementation, integration and verification of System-on-Chip (SoC) from initial specification till tapeout and production.
Addressing test quality targets in DFT architecture and test pattern generation.Leading various aspects of Test architecture including Scan&ATPG, Memory BIST, Logic BIST, Analog / PHY test and post-silicon supportWork with different functions like front-end design, verification and physical design to ensure production quality silicon.
Support post-silicon activities, working with test engineering and validation teams.
Specific Knowledge / Skills
Master / Bachelor's Degree in Electrical / Electronic Engineering.Experience 6-12 Years in DFT with successful delivery of production quality chips.
Senior SoC DFT engineers, with experiences in all aspects of DFT, including scan & ATPG, memory BIST, logic BIST, analog test, and post-silicon support.
Good understanding of design flow from specification / micro-architecture definition to design and verification, timing analysis, and physical design.
Self-motivated. Excellent written and verbal communication skill.Creative problem-solving skills, logic analysis skills, ability to logically break complex problems down to manageable components.
Should be a team player and willing to work with cross functional teams in issues resolution.