Key skills required for the job are :
Must possess strong knowledge on PCIE protocol - Gen 1 / 2 / 3 / 4
Hands on-experience in development of test-bench. verification componets (monitors, checkers, scorebards, etc)
Able to independently debug regression failures and address coverage gaps.
Must Have Good communication skills.
Mandatory Skills : VLSI HVL Verification VLSI HDL Verification, VLSI-VERIFICATION PLANNING, VLSI HVL Verification
Desirable Skills : System Verilog - SV
Language Skills : English Language