DFT Engineer-Bangalore
Ways and Works Consulting LLP
3d ago
source : Shine
  • Scan insertion and DRC cleanup
  • Pattern generation for Stuck-At, delay test, iddq, path delay and fault grading.
  • Memory testing. Should also know the algorithms.
  • Should also have knowledge about diagnostics. JTAG or P1500 or other interface mechanism
  • Desirable competencies

    The candidate is expected to have exposure to :

  • Compression tools is highly desirable
  • LBIST, mixed-signal testing, logic equivalence
  • Writing test benches and should be capable of writing RTL code for DFT blocks as and when required.
  • Bridge fault detection is desirable
  • ATE experience is an added advantage
  • to get your interview schedule share your resume or call at 9953328778

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