Sventl - DFT Engineer - MBIST/LBIST Tools (5-12 yrs) Overseas/International/Singapore (Semiconductor/VLSI/EDA)
Sventl
Delhi, IN
2d ago
source : hirist.com

SVENTL SINGAPORE is hiring for DFT Engineers.

DFT engineer with good analysing capabilities with the below :

Required Skills : Scan insertion & ATPG - Pattern Simulation with and without timing annotation and debugging simulation mismatches (Cadence Incisive).

Job Requirements :

  • Familiarity with WGL / TDL file formats.
  • Good skills in Scan compression techniques and Logic BIST.
  • Exposure to Memory BIST insertion tools (Preferably Logic Vision MBIST).
  • Good experience in Boundary Scan, JTAG concepts, Core testing using P1500.
  • Should have a basic understanding of Tester requirements.
  • Should be good at doing synthesis and timing (RC and PT / Tempus).
  • Knowledge of formal verification using LEC.
  • Exposure to SoC level DFT will be a plus.
  • Experience in low power DFT is an added advantage.
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