Intel - Physical Design Engineer - Floor Planning/PnR (5-10 yrs) Bangalore (Semiconductor/VLSI/EDA)
Bangalore, India
19h ago
source :

Job Description :

  • Master / Bachelor's degree in Engineering with 5-10 years of RTL-to-GDSII experience IP / SOC level
  • Demonstrable experience in floor planning and routing, physical design convergence and multiple tape-outs
  • Solid analytical and problem solving skills - hands on expertise in running leading edge (synopsys / Cadence) Physical design tools
  • Multiple Power Domain Analysis using standard Power Formats UPF / CPF
  • Place and Route and clock tree synthesis with Synopsys ICC2
  • Static Timing Analysis with Synopsys Primetime
  • Formal equivalence
  • Experience in 16 / 14 / 10 / 7nm a process is a must
  • Able to lead small group of Physical design Engineers
  • Qualifications :

    Candidate should possess a Bachelor's degree with 5-10 years' experience or a Master's degree in VLSI, Electronics, Electrical, Computer Engineering or Computer Science (from reputed colleges like IIT / NIT, global universities).

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