You will be part of CIPG group within the Silicon Engineering Group, in the Core IP development team driving Intel's latest CPU's in the latest process technology.
Your responsibilities will include but not limited to :
1. Driving Design Convergence of Synthesis or Datapath & Register File designs of Core blocks, characterization and quality checks to meet the design targets of high performance, and low-
power digital design as per schedule
2. Develop design methodologies
3. Design Convergence at Block / Section Level
3. Coordination with Layout & Floor plan teams.
4. Low Power Solutions
5. Static timing analysis
You must possess a Masters Degree in Electrical or Computer Engineering with at least 4 or more years of experience in related field or a Bachelors Degree with at least 6 years of experience.
Preferred Experience :
Inside this Business Group
The Silicon Engineering Group is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs that power Intel’s leadership products.
This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.
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