The Scalable Performance CPU Development Group SDG is looking for energetic and passionate senior Verification Engineers.
Direct Responsibilities : Define & implement verification / validation tests / environment to verify high speed serial links IPs & Complex SubSystems.
Having extensive experience of defining and running system simulation models, and debugging RTL / tests etc is a must.Should possess extensive knowledge of System Verilog / C++ / OVM or UVM methodology.
The candidate should have ability to work effectively with both internal and external teams / stakeholders, Strong problem solving / communication skills.
Candidate should possess a Bachelor's degree with 6-11 years' experience or a Master's degree with 5-10 years' experience in VLSI, Electronics, Electrical, Computer Engineering or Computer Science
Inside this Business Group
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms.
PEG strives to lead the industry moving forward through product innovation and world class engineering.
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